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Reseach Article

A Low Overhead Fault Reporting Scheme for Resilient 3D Network-on-Chip Applications

by Michael Opoku Agyeman
Communications on Applied Electronics
Foundation of Computer Science (FCS), NY, USA
Volume 2 - Number 4
Year of Publication: 2015
Authors: Michael Opoku Agyeman

Michael Opoku Agyeman . A Low Overhead Fault Reporting Scheme for Resilient 3D Network-on-Chip Applications. Communications on Applied Electronics. 2, 4 ( July 2015), 43-48. DOI=10.5120/cae2015651744

@article{ 10.5120/cae2015651744,
author = { Michael Opoku Agyeman },
title = { A Low Overhead Fault Reporting Scheme for Resilient 3D Network-on-Chip Applications },
journal = { Communications on Applied Electronics },
issue_date = { July 2015 },
volume = { 2 },
number = { 4 },
month = { July },
year = { 2015 },
issn = { 2394-4714 },
pages = { 43-48 },
numpages = {9},
url = { http://localhost:9000/archives/volume2/number4/397-2015651744/ },
doi = { 10.5120/cae2015651744 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
%0 Journal Article
%1 2023-09-04T19:40:41.405019+05:30
%A Michael Opoku Agyeman
%T A Low Overhead Fault Reporting Scheme for Resilient 3D Network-on-Chip Applications
%J Communications on Applied Electronics
%@ 2394-4714
%V 2
%N 4
%P 43-48
%D 2015
%I Foundation of Computer Science (FCS), NY, USA

Recently three-dimensional Networks-on-Chips (3D NoCs) ranging from regular to highly irregular topologies have been realized as efforts to improve the performance of applications in both general purpose and application-specific multi-core domain. However, faults can cause high contentions in NoCs. As a solution, adaptive routing algorithms are used. On the other hand, these algorithms have high area and timing overheads due to extra logic required for adaptively. We present a novel fault reporting scheme as well as a fault-tolerant routing algorithm for emerging 3D NoCs. The proposed algorithm analyses the condition of the NoC resources and distance of the destination nodes to reroute packets. The algorithm has been evaluated by synthetic and various real-world traffic patterns. Experimental results show that the proposed algorithm has significant reduction in packet delays (over 45%) compared to other algorithms.

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Index Terms

Computer Science
Information Sciences


Networks-on-Chip Fault-tolerant Routing algorithms